What is the use of USRP?

The SDR architecture typically includes processors&#;whether that is on board or the computer&#;FPGAs and tunable RF front ends. USRP and LabVIEW offer flexibility, functionality, and affordability to deliver an ideal SDR prototyping solution for educational laboratories and communications research. 

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Figure 1: Typical architecture of a software-defined radio

LabVIEW provides the signal processing engine for the modulation and demodulation of signals streaming to and from USRP hardware. You can add the LabVIEW Real-Time and LabVIEW FPGA modules to target NI Linux Real-Time OSs and FPGAs all from the same development environment. LabVIEW also offers functional blocks for many common analog and digital modulation techniques and signal processing algorithms optimized for real-world radio signals.

3a. Host-Only USRP

Figure 2: NI USRP-

Following a common SDR architecture, USRP hardware implements a direct conversion analog front end with high-speed analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) featuring a fixed-personality FPGA for the digital downconversion (DDC) and digital upconversion (DUC) steps. The receiver chain begins with a highly sensitive analog front end that can receive very small signals and digitize them using direct downconversion to in-phase (I) and quadrature (Q) baseband signals. Downconversion is followed by high-speed analog-to-digital conversion and a DDC that reduces the sampling rate and packetizes I and Q for transmission to a host computer using Gigabit Ethernet for further processing. The transmitter chain starts with the host computer where I and Q are generated and transferred over the Ethernet cable to the USRP hardware. A DUC prepares the signals for the DAC after which I-Q mixing occurs to directly upconvert the signals to produce an RF frequency signal, which is then amplified and transmitted.

Figure 3: USRP- System-Level Diagram

3b. USRP Devices with Programmable FPGAs

Figure 4: NI USRP-

The NI USRP-294x/295x devices combine two full-duplex transmit and receive channels with up to 160 MHz/channel of real-time bandwidth and a large DSP-oriented Kintex-7 FPGA in a half-1U rack-mountable form factor. The analog RF front end interfaces with the large Kintex-7 410T FPGA through dual ADCs and DACs clocked at 120 MS/s. 

Each RF channel includes a switch allowing for time division duplex (TDD) operation on a single antenna using the TX 1 RX1 port, or frequency division duplex (FDD) operation using two ports, TX1 and RX2. 

The NI USRP-294x/295x devices cover from 10 MHz to 6 GHz frequency range with user-programmable digital IO lines for controlling external devices. The Kintex-7 FPGA is a reconfigurable LabVIEW FPGA target that incorporates DSP48 coprocessing for high-rate, low-latency applications. The PCI Express x4 connection back to the system controller allows up to 800 MB/s of streaming data transfer back to your desktop or PXI chassis, and 200 MB/s to your laptop. This connection allows up to 17 USRP devices to be cabled back to a single PXI Express chassis, which can then be daisy chained together for high-bandwidth, high-channel-count applications.

Figure 5: USRP- System-Level Diagram

3c. NI USRP- Stand-Alone Device

Figure 6: NI USRP-

The stand-alone NI USRP- includes an onboard processor, FPGA, and RF all in one form factor. The USRP- is built on a heterogeneous processing architecture with an onboard Intel Core i7 processor running the NI Linux Real-Time OS. It is a 2x2 radio that covers frequencies between 10 MHz and 6 GHz with the 160 MHz bandwidth and adds an x86 processor to form stand-alone system operation, which can be targeted to deterministically perform processing and program the Xilinx Kintex 470 FPGA all from a single design environment. The USRP- is also equipped with a GPS-disciplined 10 MHz oven-controlled crystal oscillator (OCXO) Reference Clock.

Figure 7: USRP- System-Level Diagram

Universal Software Radio Peripheral (USRP) is a range of software-defined radios designed and sold by Ettus Research and its parent company, National Instruments. Developed by a team led by Matt Ettus, the USRP product family is commonly used by research labs, universities, and hobbyists.[1]

Most USRPs connect to a host computer through a high-speed link, which the host-based software uses to control the USRP hardware and transmit/receive data. Some USRP models also integrate the general functionality of a host computer with an embedded processor that allows the USRP device to operate in a stand-alone fashion.

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The USRP family was designed for accessibility, and many of the products are open source hardware. The board schematics for select USRP models are freely available for download; all USRP products are controlled with the open source UHD driver, which is free and open source software.[2] USRPs are commonly used with the GNU Radio software suite to create complex software-defined radio systems.

The USRP product family includes a variety of models that use a similar architecture. A motherboard provides the following subsystems: clock generation and synchronization, FPGA, ADCs, DACs, host processor interface, and power regulation. These are the basic components that are required for baseband processing of signals. A modular front-end, called a daughterboard, is used for analog operations such as up/down-conversion, filtering, and other signal conditioning. This modularity permits the USRP to serve applications that operate between DC and 6 GHz.

In stock configuration the FPGA performs several DSP operations, which ultimately provide translation from real signals in the analog domain to lower-rate, complex, baseband signals in the digital domain. In most use-cases, these complex samples are transferred to/from applications running on a host processor, which perform DSP operations. The code for the FPGA is open-source and can be modified to allow high-speed, low-latency operations to occur in the FPGA.

The USRP hardware driver (UHD) is the device driver provided by Ettus Research for use with the USRP product family.[3] It supports Linux, MacOS, and Windows platforms. Several frameworks including GNU Radio, LabVIEW, MATLAB and Simulink use UHD. The functionality provided by UHD can also be accessed directly with the UHD API, which provides native support for C++. Any other language that can import C++ functions can also use UHD. This is accomplished in Python through SWIG, for example.

UHD provides portability across the USRP product family. Applications developed for a specific USRP model will support other USRP models if proper consideration is given to sample rates and other parameters.

Several software frameworks support UHD:

• GNU Radio is a Free/Libre toolkit that can be used to develop software-defined radios. This framework uses a combination of C++ and Python to optimize DSP performance while providing an easy-to-use application programming environment.GNU Radio Companion is a graphical programming environment provided with GNU Radio.[4]
• National Instruments sells the NI USRP 292x series, which is functionally equivalent to the Ettus Research USRP N210. NI also offers LabVIEW support for this device with the NI-USRP Driver.[5]
• USRP N210 and USRP2 are supported by MATLAB and Simulink.[6] This package includes plug-ins and several examples for use with both the devices.
• OpenLTE is an open source implementation of the 3GPP LTE specifications as a SDR.[7][circular reference]
• Many users develop with their own, custom frameworks. In this case, the USRP device can be accessed with the UHD API.[8] There are also examples provided with UHD that show how to use the API.[9]

The USRP N200 and USRP N210 are high-performance USRP devices that provide higher dynamic range and higher bandwidth than the bus series. Using a Gigabit Ethernet interface, the devices in the Networked Series can transfer up to 50 MS/s of complex, baseband samples to/from the host. This series uses a dual, 14-bit, 100 MS/s ADC and dual 16-bit, 400 MS/s DAC. This series also provides a MIMO expansion port which can be used to synchronize two devices from this series. This is the recommended solution for MIMO systems.

The X300 and X310 are third-generation USRPs that feature two full-duplex daughterboard slots and feature full 200 MS/s DACs and ADCs. As network interface, 10GBase over SFP+ allows full 200 MS/s on both channels in full-duplex operation.

The N300, N310, N320 and N321 are current dual-channel models offering SFP+ connectivity, up to 200 MS/s and optionally sharing of local oscillators and TPM modules for verifiable software deployments.

All products in Ettus Research Bus Series use a USB 2.0 or USB 3.0 interface to transfer samples to and from the host computer.

The Embedded Series combines the same functionality of other USRP devices with an OMAP 3 embedded processor. The E310, released in November , utilizes the Zynq SoC platform and the Analog Devices AD RFIC for a very compact, embedded USRP. The devices in this family do not need to be connected to an external PC for operation. The Embedded Series is designed for applications that require stand-alone operation.

The USRP2 was developed after the USRP and was first made available in September . It has reached end of life and has been replaced by the USRP N200 and USRP N210. The USRP2 was not intended to replace the original USRP, which continued to be sold in parallel to the USRP2. This first generation USRP is also no longer available publicly.

The E100 series of embedded USRPs is no longer available.

The original USRP, USRP2, USRP E1xx, USRP N2xx and X3xx families feature a modular architecture with interchangeable daughterboard modules that serve as the RF front end. Several classes of daughterboard modules exist: Receivers, Transmitters and Transceivers.

• Transmitter daughterboard modules can modulate an output signal to a higher frequency
• Receiver daughterboard modules can acquire an RF signal and convert it to baseband
• Transceiver daughterboard modules combine the functionality of a Transmitter and Receiver.

The USRP B2xx and E3xx do not feature exchangeable daughterboards. The N3xx series has a JESD204B-attached daughterboard featuring the AD frontend, but currently, no alternative daughterboards are commercially available.

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